STM32F100RB
- Core: ARM 32-bit Cortex™-M3 CPU
- 24 MHz maximum frequency,1.25 DMIPS/MHz (Dhrystone 2.1) performance
- Single-cycle multiplication and hardware division
- Memories
- 16 to 128 Kbytes of Flash memory
- Clock, reset and supply management
- 2.0 to 3.6 V application supply and I/Os
- POR, PDR and programmable voltage detector (PVD)
- 4-to-24 MHz crystal oscillator
- Internal 8 MHz factory-trimmed RC
- 32 kHz oscillator for RTC with calibration
- Low power
- Sleep, Stop and Standby modes
- VBATsupply for RTC and backup registers
- Debug mode
- Serial wire debug (SWD) and JTAG interfaces
- DMA
- Peripherals supported: timers, ADC, SPIs, I2Cs, USARTs and DACs
- 1 × 12-bit, 1.2 μs A/D converter (up to 16 channels)
- Conversion range: 0 to 3.6 V
- 2 × 12-bit D/A converters
- Up to 80 fast I/O ports
- 37/51/80 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant
- Up to 12 timers
- Up to three 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter
- 16-bit, 6-channel advanced-control timer: up to 6 channels for PWM output, dead time generation and emergency stop
- One 16-bit timer, with 2 IC/OC, 1 OCN/PWM, dead-time generation and emergency stop
- Two 16-bit timers, each with IC/OC/OCN/PWM, dead-time generation and emergency stop
- 2 watchdog timers (Independent and Window)
- SysTick timer: 24-bit downcounter
- Two 16-bit basic timers to drive the DAC
- Up to 8 communications interfaces
- Up to two I2C interfaces (SMBus/PMBus)
- Up to 3 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
- Consumer electronics control (CEC) interface
- CRC calculation unit, 96-bit unique ID
- ECOPACK®packages
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